During the design of very large digital structures, such as VLSI circuits comprising upwards of 100,000 transistors, it is crucial to have available relatively quick means for simulating the performance of a current version of the structure. In addition, it is sometimes necessary to perform rigorous fault grading of a proposed structure; that is, to accurately determine the effects of a particular failure within the structure. Hereinafter, all processes which seek to model the performance of a digital structure, such as simulation and fault grading, are referred to generically as simulation.
One approach to the problem is to devise a program to be run on a general purpose computer (hereinafter, a software simulator) which performs the simulation. Such software simulators are currently available, but would require several months to a year of dedicated CPU time to simulate a 100,000 transistor structure. This is obviously too long to be incorporated into a realistic design cycle.
The other approach is to design a special purpose processor (hereinafter, a hardware simulator) which is loaded by a host computer with a description of the structure to be simulated, which host computer subsequently receives the results of the simulation from the hardware processor.
An example of such a hardware processor is described in U.S. Pat. No. 4,306,286, issued to John Cocke et al. on Dec. 15, 1981. This device, designated a Logic Simulation Machine by its inventors, is a very large device comprising a plurality of highly parallel basic processors which are interconnected by means of a switch and a local computer, which is coupled to a mainframe host computer. In the described embodiment, each basic processor simulates 1K (1024) gates. Each gate, also referred to as a primitive, is the basic functional unit with which the structure is described and has 5 inputs and 1 output. While any digital structure can be simulated with very simple primitives (e.g. the Boolean Functions AND, OR and XOR), more primitives are required to describe a given structure if each is excessively simple. The Logic Simulation Machine invented by Cocke et al. requires the dedication of an extremely complicated and costly device comprising a mainframe computer, a minicomputer and the array of basic processors for days, weeks or months at a time to perform a single simulation. Therefore, a need exists for a hardware simulator capable of performing simulations of substantially the same magnitude as the Logic Simulation Machine, but at reduced cost.